regex - Using python to parse verilog inputs -

i have project need parse information verilog files. issue right files have various styles of inputs. example, explicitly declared so:

input clk, reset, enable; input clk; 

where code looks like

module name (a,b,c,d, etc); 

and inputs , outputs declared explicitly. however, of code has declarations so:

module name (   input a,   input b) 

etc. way have python regex right is:

input_mod = re.search(r'.*?\binput\b(.*?\s+),|;', line)  inputs.append(input_mod.group(1)) 

where line each line of document, , inputs list. think handles latter example , part of first example, have no idea how have pick 1 both commas , semicolons included. help?