c - How to force a full recompilation of all files for every make? -


i'm hoping create basic makefile template small-scale c apps. in scenario, i'm less concerned performance clarity , want recompile - .h , .c files, , third-party .so files.

# constants #===============================================================================  # specify c complier cc = gcc  # list flags pass compiler #  -ggdb       compile debug information gdb #  -wall       give diagnostic warnings #  -o0         not optimize generated code #  -m64        generate code 64-bit environment cflags = -ggdb -wall -o0 -m64  # change list of c source files list of object files replacing # .c suffix .o objects := $(patsubst %.c,%.o,$(wildcard *.c))  # list libraries # m    math library libraries = -lm  # specify build target target = heyyou  # rules #=============================================================================== # $@ = left side of colon, target $(target) : $(objects)     @echo "compiling $@..."     $(cc) -o $(target) $(objects) $(cflags) $(libraries)

if have made makefile considering decencies, use 

make clean

if have made proper makefile, dependencies handled automatically , every change make in file system, don't have "make clean" every time. simple "make" enough.
if have not handled dependencies in make, notice changes make in source code won't reflect in binaries. simple work around add these lines in makefile

clean:     rm *.so     rm *.o

now, every compilation, 

make clean  make

its not proper way handle makefile saviour in frustrating situation.


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